The present application relates to an imaging apparatus for taking an image by making use of a solid-state imaging sensor, an imaging circuit employed in the imaging apparatus and an imaging method adopted by the imaging apparatus. More particularly, the present application relates to an imaging apparatus having a configuration for temporarily storing an image signal obtained from an imaging operation in a memory and processing the image signal stored in the memory, relates to an imaging circuit suitable for the configuration and relates to an imaging method adopted by the imaging apparatus.
In recent years, an imaging apparatus capable of taking an image by making use of a solid-state imaging sensor and storing the image in a memory as digital data has been becoming very popular. Examples of such an imaging apparatus are a digital still camera and a digital video camera. For such an imaging apparatus, progress is being made with regard to efforts to increase the number of pixels in the solid-state imaging sensor, raise the number of functions of the apparatus and enhance the performance of the apparatus. In particular, as the number of pixels in the solid-state imaging sensor is increased, the load of processing the image signal generated as a result of an imaging process becomes heavier. However, even such an imaging apparatus is desired to be capable of processing the image signal at a high speed so as to cause no stress developed in the user.
FIG. 12 is a block diagram showing a typical configuration of the imaging apparatus in related art. The imaging apparatus shown in FIG. 12 employs an imaging sensor 81, an AFE (analog front end) circuit 82, a digital image processing circuit 83, an SDRAM (synchronous dynamic random access memory) 84, a ROM (read only memory) 85 and a storage device 86. The digital image processing circuit 83 has a camera-signal pre-processing section 91, a camera-signal processing section 92, a resolution conversion section 93, a JPEG (Joint photographic experts group) engine 94, a CPU (central processing unit) 95, a video output encoder 96 and an SDRAM controller 97. The camera-signal pre-processing section 91, the camera-signal processing section 92, the resolution conversion section 93, the JPEG engine 94, the CPU 95, the video output encoder 96 and the SDRAM controller 97 are connected to each other by an internal bus 98.
In such an imaging apparatus, image signals generated by the imaging sensor 81 as a result of an imaging operation are sequentially supplied to the AFE circuit 82 for earning processing such as a CDS (correlated double sampling) process and an AGC (automatic gain control) process on the signals before converting the image signals into a digital signal to be supplied to the digital image processing circuit 83. In the digital image processing circuit 83, the camera-signal pre-processing section 91 carries out processing such as a defective-pixel correction process and a shading process on the digital image signal received from the AFE circuit 82 and supplies the result of the processing to the SDRAM 84 by way of the SDRAM controller 97 as raw image data.
The camera-signal processing section 92 reads out the raw image data from the SDRAM 84 through the SDRAM controller 97, earning out a variety of detection processes and an image quality correction process (or a camera-signal process) on the raw image data. Subsequently, the camera-signal processing section 92 converts the result of the processes into a luminance signal Y and color-difference signals R-Y and B-Y, outputting the luminance signal Y and color-difference signals R-Y and B-Y. The resolution conversion section 93 carries out resolution conversion processing on the image data output by the camera-signal processing section 92 in order to produce image data having a resolution proper for a display if necessary.
The video output encoder 96 converts the image data produced by the resolution conversion section 93 as image data having a resolution proper for a display into an image signal to be displayed on a monitor. Then, the video output encoder 96 outputs tire image signal to the monitor not shown in the figure or a video output terminal 96a. In this way, a camera-through image can be displayed. The JPEG engine 94 carries out a compression/encoding process according to a JPEG method on the image data generated by the camera-signal processing section 92 or the resolution conversion section 93 and temporarily stores JPEG-encoded data obtained as a result of the process in the SDRAM 84. The CPU 95 transfers the JPEG-encoded data from the SDRAM 84 to the storage device 86 used for recording the data.
It is to be noted that the CPU 95 executes overall control of the entire processing carried out by the imaging apparatus. The ROM 85 is a memory used for storing programs to be executed by the CPU 95 and data necessary in the execution of the programs.
In addition, in the typical configuration described above, a taken image is recorded in the storage device 86 as JPEG data. As an alternative, however, it is possible to implement an imaging apparatus having a function to record raw image data not subjected to processing including the camera-signal process into the storage device 86 as it is. For example, an imaging apparatus described in documents such as Japanese Patent Laid-open No. 2004-40300 (herein after referred to as patent document 1) has a function to compress raw image data by adoption of a reversible compression technique making use of a Huffman table and record compressed image data obtained as a result of the compression. In this imaging apparatus, the Huffman, table is optimized for every color channel. In an imaging apparatus described in documents such as Japanese Patent Laid-open No. 2003-125209 (hereinafter referred to as patent document 2), in a raw-data compression mode for compressing raw image data and recording compressed image data obtained as a result of the compression, an interpolation processing section configured to interpolate the raw image data in a normal compression mode is bypassed.
In addition, in a relevant imaging apparatus described in documents such as Japanese Patent Laid-open No. Hei 5-191770 (hereinafter referred to as patent document 3), image data acquired from an imaging sensor is subjected to a reversible compression process and compressed image data obtained as a result of the process is stored temporarily in a memory. Then, the compressed image data is subjected to a decompression process and signal processing prior to an irreversible compression process, the result of which is again stored in a memory.